Intel SE7525GP2 Product Specification - Page 27
Intel, E7320 Chipset Intel, Server Board SE7320SP2 - e7525
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Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.1.8 CPU Thermal Sensors The CPU temperature will be indirectly measured by the thermal diodes. These are monitored by the LM93* device. The mBMC configures the LM93 device to monitor these sensors. The temperatures are available via mBMC IPMI sensors. 3.1.9 Processor Thermal Control Sensor The Intel® Xeon® processors generate a signal indicating throttling due to thermal conditions. The mBMC implements an IPMI sensor that provides the percentage of time a processor has been throttling over the last 1.46 seconds. Server management forces a thermal control condition when reliable system operation requires reduced power consumption. 3.1.10 Processor Thermal Trip Shutdown If a thermal overload condition exists (thermal trip) an Intel® Xeon® processor outputs a digital signal that is monitored by the server board management sub-system. A thermal trip is a critical condition and indicates that the processor may become damaged if it continues to run. To help protect the processor, the management controller automatically powers off the system. In addition it will assert the System Status LED and generate an event in the system event log. 3.1.11 Processor IERR The IERR signal is asserted by the Intel® Xeon® processor as a result of an internal error. The mBMC configures the heceta7 device to monitor this signal. When this signal is asserted, the mBMC generates a processor IERR event. 3.2 Intel® E7320 Chipset (Intel® Server Board SE7320SP2) The architecture of the Intel® Server Board SE7320SP2 is designed around the Intel® E7320 chipset. The Intel® Server Board SE7525GP2 is designed around the Intel® E7525 chipset. This is discussed in the next section. The Intel® E7320 chipset is a subset of the Intel® E7520 chipset and consists of two components that together are responsible for providing the interface between all major subsystems found on the server board, including the processor, memory, and I/O sub-systems. These components are: Memory controller hub (MCH) I/O controller hub (Intel® 6300ESB) The following sub-sections provide an overview, describing the primary functions and supported features of each chipset component. Later sections discuss how these features are implemented on the Server Board SE7320SP2. Revision 4.0 15