HP NetServer AA 6200 HP NetServer AA 6200 Solution Release 3.0 Messages - Page 38

IOPn.MtcMon status: The CE MIC bus IDs do not match. CE1 MIC bus ID = x. CE2 MIC

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Chapter 1 Introduction Table 1-5HP NetServer AA Message Summary - Prefixed Messages (Continued) Message Page IOPn.MtcMon status: The CE CPU ID 0xx power-on settings do not match. CE1 CPU power-on settings = 0xy. CE2 CPU power-on settings = 0xz. IOPn.MtcMon status: The CE CPU ID 0xx speeds do not match. CE1 CPU speed = y MHz CE2 CPU speed = z MHz IOPn.MtcMon status: The CE CPU ID 0xx versions are not compatible. CE1 CPU version information = 0xy. CE2 CPU version information = 0xz. IOPn.MtcMon status: The CE CPUx model and/or family types are not compatible. CE1 CPU ID register = 0xy. CE2 CPU ID register = 0xz. IOPn.MtcMon status: The CE CPUx stepping IDs do not match. CE1 CPU ID register = 0xy. CE2 CPU ID register = 0xz. IOPn.MtcMon status: The CE MIC BIOS revisions are not compatible. CE1 MIC BIOS revision = x. CE2 MIC BIOS revision = y. IOPn.MtcMon status: The CE MIC BIOS setting for PCI parity checking differs between CEs. IOPn.MtcMon status: The CE MIC bus IDs do not match. CE1 MIC bus ID = x. CE2 MIC bus ID = y. IOPn.MtcMon status: The CE MIC FPGA revisions do not match. CE1 MIC FPGA revision = 0xx. CE2 MIC FPGA revision = 0xy. IOPn.MtcMon status: The CE MIC microcode edit levels do not match. CE1 MIC microcode revision = 0xx. CE2 MIC microcode revision = 0xy. IOPn.MtcMon status: The CE MIC microcode revisions are not compatible. CE1 MIC microcode revision = 0xx. CE2 MIC microcode revision = 0xy. IOPn.MtcMon status: The CE MIC module edit levels do not match. CE1 MIC module revision = 0xx. CE2 MIC module revision = 0xy. IOPn.MtcMon status: The CE MIC module revisions do not match. CE1 MIC module revision = x. CE2 MIC module revision = y. IOPn.MtcMon status: The CE MIC PCI base addresses x do not match. CE1 PCI base address = 0xy. CE2 PCI base address = 0xz. IOPn.MtcMon status: The CE MIC PCI device addresses do not match. CE1 PCI address = 0xx. CE2 PCI address = 0xy. IOPn.MtcMon status: The CE MIC PCI interrupt assignments do not match. CE1 PCI interrupt information = 0xx. CE2 PCI interrupt information = 0xy. IOPn.MtcMon status: The CE operating system cannot be synchronized. page 274 page 274 page 275 page 275 page 276 page 276 page 277 page 277 page 278 page 278 page 279 page 279 page 280 page 280 page 281 page 281 page 282 28

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Chapter 1
Introduction
28
IOPn.MtcMon status: The CE CPU ID 0xx power-on settings do not match. CE1 CPU
power-on settings = 0xy. CE2 CPU power-on settings = 0xz.
page 274
IOPn.MtcMon status: The CE CPU ID 0xx speeds do not match. CE1 CPU speed = y MHz
CE2 CPU speed = z MHz
page 274
IOPn.MtcMon status: The CE CPU ID 0xx versions are not compatible. CE1 CPU version
information = 0xy. CE2 CPU version information = 0xz.
page 275
IOPn.MtcMon status: The CE CPUx model and/or family types are not compatible. CE1
CPU ID register = 0xy. CE2 CPU ID register = 0xz.
page 275
IOPn.MtcMon status: The CE CPUx stepping IDs do not match. CE1 CPU ID register =
0xy. CE2 CPU ID register = 0xz.
page 276
IOPn.MtcMon status: The CE MIC BIOS revisions are not compatible. CE1 MIC BIOS
revision = x. CE2 MIC BIOS revision = y.
page 276
IOPn.MtcMon status: The CE MIC BIOS setting for PCI parity checking differs between
CEs.
page 277
IOPn.MtcMon status: The CE MIC bus IDs do not match. CE1 MIC bus ID = x. CE2 MIC
bus ID = y.
page 277
IOPn.MtcMon status: The CE MIC FPGA revisions do not match. CE1 MIC FPGA revision
= 0xx. CE2 MIC FPGA revision = 0xy.
page 278
IOPn.MtcMon status: The CE MIC microcode edit levels do not match. CE1 MIC
microcode revision = 0xx. CE2 MIC microcode revision = 0xy.
page 278
IOPn.MtcMon status: The CE MIC microcode revisions are not compatible. CE1 MIC
microcode revision = 0xx. CE2 MIC microcode revision = 0xy.
page 279
IOPn.MtcMon status: The CE MIC module edit levels do not match. CE1 MIC module
revision = 0xx. CE2 MIC module revision = 0xy.
page 279
IOPn.MtcMon status: The CE MIC module revisions do not match. CE1 MIC module
revision = x. CE2 MIC module revision = y.
page 280
IOPn.MtcMon status: The CE MIC PCI base addresses x do not match. CE1 PCI base
address = 0xy. CE2 PCI base address = 0xz.
page 280
IOPn.MtcMon status: The CE MIC PCI device addresses do not match. CE1 PCI address =
0xx. CE2 PCI address = 0xy.
page 281
IOPn.MtcMon status: The CE MIC PCI interrupt assignments do not match. CE1 PCI
interrupt information = 0xx. CE2 PCI interrupt information = 0xy.
page 281
IOPn.MtcMon status: The CE operating system cannot be synchronized.
page 282
Table 1-5HP NetServer AA Message Summary
–
Prefixed Messages
(Continued)
Message
Page