Brother International HL 1850 Service Manual - Page 78
Block, Diagram
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CHAPTER 3 THEORY OF OPERATION 1.2 Main PCB Block Diagram HL-1850 HL-1870N Fig. 3-2 shows the block diagram of the main PCB of the HL-1850 and the HL-1870N printers. ASIC Reset Circuit CPU Core (MB86834) BUS INT Oscillator (48MHz) Program + Font ROM 10 Mbytes Network Program (2.0 Mbytes) RAM (HL-1650: 8.0 Mbytes) (HL-1670N: 16 Mbytes) Option RAM (DIMM) (max. 128Mbytes) Address Decoder DRAM Control Timer FIFO CDCC Parallel I/O USB I/O Soft Support To PC To PC EEPROM (8192 x 8 bits) EEPROM I/O To PC or Hub Network Board (Option for HL-1650) To Engine PCB Fig. 3-2 Engine Control I/O Oscillator 33.3MHz PCI Bus Control 3-2
CHAPTER
3
THEORY
OF
OPERATION
1.2
Main
PCB
Block
Diagram
HL
-1850
HL
-1870N
Fig.
3-2
shows
the
block
diagram
of
the
main
PCB
of
the
HL
-1850
and
the
HL
-1870N
printers.
ASIC
To
PC
or
Hub
Reset
Circuit
Program
+
Font
ROM
10
Mbytes
CPU
Core
(MB86834)
BUS
INT
Oscillator
(48MHz)
Network
Program
(2.0
Mbytes)
RAM
(HL
-1650:
8.0
Mbytes)
(HL
-1670N:
16
Mbytes)
Option
RAM
(DIMM)
(max.
128Mbytes)
EEPROM
(8192
x
8
bits)
Address
Decoder
DRAM
Control
Timer
FIFO
CDCC
Parallel
I/O
USB
I/O
Soft
Support
Network
Board
(Option
for
HL
-1650)
EEPROM
I/O
To
Engine
PCB
Engine
Control
I/O
Oscillator
33.3MHz
Fig.
3-2
PCI
Bus
Control
To
PC
To
PC
3-2