Brother International HL 1850 Service Manual - Page 79

HL-1850/1870N SERVICE MANUAL 1.3 Main PCB For the entire circuit diagram of the main PCB, see APPENDIX 2. to 7. `MAIN PCB CIRCUIT DIAGRAM, HL-1850/1870N in this manual. 1.3.1 ASIC HL-1850 HL-1870N A Fujitsu 32bit RISC CPU, MB86834 (SPARC lite) is built in the ASIC. While the CPU is driven with a clock frequency of 48 MHz in the user logic block, it itself runs at 96 MHz, which is generated by multiplying the source clock by two. The functions of the interface block communication with external devices are described below; (1) IEEE1284 Stores the data received from the PC into DRAM as controlled by the DMA controller. It is applicable to both normal receiving and bi-directional communication (nibble mode, byte mode, ECP mode). okhotiott g§ggg§g§§mmsw NliWANZI NRIET,.529Mg trnlzi el iiiomm66t§otttomtg6mett 334 O =as O O O O O O ttir, "a a ama~)2 el caz, .1 WO aty I Rae, v., ..4•EV.% 63,961,-,LR3',G+£6a two m malusaaf v., er 66,-1 Vim Fig. 3-3 yrsua a Ita.a.C,Ft 3-3