HP Workstation x2000 hp workstation x2000 - Technical Reference and Troublesho - Page 108
Order in Which POSTs Occur,
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Tests and Error Messages Order in Which POSTs Occur Table 4-1 Checkpoint Code 24h 26h 28h 29h 2Ah 2Ch 2Eh 2Fh 30h 32h 33h 36h 38h 3Ah 3Ch 3Dh 42h 45h 46h 48h 49h 4Ah POST Checkpoint Codes POST Routine Description MaxiLife LCD Display Message Set ES segment register to 4GB Enable A20 line Autosize DRAM Initialize POST memory manager Clear 512KB base RAM RAM failure on address linea RAM failure on data bits xxxx1 of low byte of memory bus Enable cache before system BIOS shadow RAM failure on data bits xxxx1 of high byte of memory bus Test CPU bus-clock frequency Initialize POST dispatch manager Warm start shut down Shadow system BIOS ROM Autosize cache Advanced configuration of chipset registers Load alternate registers with CMOS values Initialize interrupt vectors POST device initialization Check ROM copyright notice Check video configuration against CMOS Initialize PCI bus and devices Initialize all video adapters in system Memory Detection RAM Add. Failure RAM Data Low RAM Data High Shadow BIOS ROM PCI Detection Video Detection Beep Codes 3 5 4 108 Chapter 4