AMD AMD-K6-2/400 User Guide - Page 111
DNow!™ Instructions, Table 14., MMX™ Instructions continued, Instruction Mnemonic, Prefix, Bytes
View all AMD AMD-K6-2/400 manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 111 highlights
23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Table 14. MMX™ Instructions (continued) Instruction Mnemonic PXOR mmreg, mem64 Prefix First Byte(s) Byte 0Fh EFh Notes: 1. Bits 2, 1, and 0 of the modR/M byte select the integer register. ModR/M Byte mm-xxx-xxx Decode Type short RISC86 Operations mload, meu Table 15. 3DNow!™ Instructions Instruction Mnemonic FEMMS PAVGUSB mmreg1, mmreg2 PAVGUSB mmreg, mem64 PF2ID mmreg1, mmreg2 PF2ID mmreg, mem64 PFACC mmreg1, mmreg2 PFACC mmreg, mem64 PFADD mmreg1, mmreg2 PFADD mmreg, mem64 PFCMPEQ mmreg1, mmreg2 PFCMPEQ mmreg, mem64 PFCMPGE mmreg1, mmreg2 PFCMPGE mmreg, mem64 PFCMPGT mmreg1, mmreg2 PFCMPGT mmreg, mem64 PFMAX mmreg1, mmreg2 PFMAX mmreg, mem64 PFMIN mmreg1, mmreg2 PFMIN mmreg, mem64 PFMUL mmreg1, mmreg2 PFMUL mmreg, mem64 PFRCP mmreg1, mmreg2 PFRCP mmreg, mem64 PFRCPIT1 mmreg1, mmreg2 PFRCPIT1 mmreg, mem64 PFRCPIT2 mmreg1, mmreg2 PFRCPIT2 mmreg, mem64 PFRSQIT1 mmreg1, mmreg2 Prefix Byte(s) 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh 0Fh, 0Fh Opcode Byte 0Eh BFh BFh 1Dh 1Dh AEh AEh 9Eh 9Eh B0h B0h 90h 90h A0h A0h A4h A4h 94h 94h B4h B4h 96h 96h A6h A6h B6h B6h A7h ModR/M Byte 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx mm-xxx-xxx 11-xxx-xxx Decode Type vector short short short short short short short short short short short short short short short short short short short short short short short short short short short RISC86 Operations meu mload, meu meu mload, meu meu mload, meu meu mload, meu meu mload, meu meu mload, meu meu mload, meu meu mload, meu meu mload, meu meu mload, meu meu mload, meu meu mload, meu meu mload, meu meu Chapter 3 Software Environment 89