AMD AMD-K6-2/400 User Guide - Page 214
Shutdown Cycle
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Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 Shutdown Cycle CLK A[31:3] BE[7:0]# ADS# LOCK# M/IO# D/C# W/R# D[63:0] KEN# BRDY# In Figure 78 on page 192, a shutdown (triple fault) occurs in the first half of the waveform, and a shutdown special cycle follows in the second half. The processor enters shutdown when an interrupt or exception occurs during the handling of a double fault (INT 8), which amounts to a triple fault. When the processor encounters a triple fault, it stops its activity on the bus and generates the shutdown special bus cycle (BE[7:0]# = FEh). The system logic must assert NMI, INIT, RESET, or SMI# to get the processor out of the shutdown state. Shutdown Occurs (Triple Fault) Shutdown Special Cycle A[4:3] = 00b FEh Figure 78. Shutdown Cycle 192 Bus Cycles Chapter 7