AMD AMD-K6-2/400 User Guide - Page 113
Logic Symbol Diagram - tm -
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23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 4 Logic Symbol Diagram Clock Voltage Detection2 CLK BF[2:0] VID[4:0] VCC2DET VCC2H/L# Bus Arbitration AHOLD BOFF# BREQ HLDA HOLD BRDY# BRDYC# D[63:0] DP[7:0] PCHK# Address and Address Parity A20M# A[31:3] AP ADS# ADSC# APCHK# BE[7:0]# EADS# HIT# HITM# INV Cycle Definition and Control D/C# EWBE# LOCK# M/IO# NA# SCYC W/R# Cache Control CACHE# KEN# PCD PWT WB/WT# AMD-K6-2E+ Processor1 FERR# IGNNE# FLUSH# INIT INTR NMI RESET SMI# SMIACT# STPCLK# TCK TDI TDO TMS TRST# Data and Data Parity Inquire Cycles Floating-Point Error Handling External Interrupts, SMM, Reset and Initialization JTAG Test Notes: 1. The signals are grouped by function. The arrows show the direction of the signal, either into or out of the processor. Signals with doubleheaded arrows are bidirectional. Signals with pound signs (#) are active Low. 2. The VID[4:0] outputs are supported on low-power versions only. The VCC2DET and VCC2H/L# outputs are supported on the CPGA package only. Chapter 4 Logic Symbol Diagram 91