AMD AMD-K6-2/400 User Guide - Page 330
Table 70., TCK Waveform and TRST# Timing at 25 MHz, Table 71., Test Signal Timing at 25 MHz
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Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 Table 70. TCK Waveform and TRST# Timing at 25 MHz Symbol Parameter Description Preliminary Data Min Max TCK Frequency 25 MHz t103 TCK Period t104 TCK High Time t105 TCK Low Time 40.0 ns 14.0 ns 14.0 ns t1061,2 t107 t1083 TCK Fall Time TCK Rise Time TRST# Pulse Width 30.0 ns 5.0 ns 5.0 ns Notes: 1. Rise/Fall times can be increased by 1.0 ns for each 10 MHz that TCK is run below its maximum frequency of 25 MHz. 2. Rise/Fall times are measured between 0.8 V and 2.0 V. 3. Asynchronous. Table 71. Test Signal Timing at 25 MHz Symbol Parameter Description t1091 TDI Setup Time t1101 TDI Hold Time t1111 TMS Setup Time t1121 TMS Hold Time t1132 TDO Valid Delay t1142 TDO Float Delay t1152 All Outputs (Non-Test) Valid Delay t1162 All Outputs (Non-Test) Float Delay t1171 All Inputs (Non-Test) Setup Time t1181 All Inputs (Non-Test) Hold Time Notes: 1. Parameter is measured from the TCK rising edge. 2. Parameter is measured from the TCK falling edge. Preliminary Data Min Max 5.0 ns 9.0 ns 5.0 ns 9.0 ns 3.0 ns 13.0 ns 16.0 ns 3.0 ns 13.0 ns 16.0 ns 5.0 ns 9.0 ns Figure 110 110 110 110 110 110 111 Figure 112 112 112 112 112 112 112 112 112 112 308 Signal Switching Characteristics Chapter 16