AMD AMD-K6-2/400 User Guide - Page 132

Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 5.21 EWBE# (External Write Buffer Empty) Pin Attribute Input Summary The system logic can negate EWBE# to the processor to indicate that its external write buffers are full and that additional data cannot be stored at this time. This causes the processor to delay the following activities until EWBE# is sampled asserted: s The commitment of write hit cycles to cache lines in the modified state or exclusive state in the processor's caches s The decode and execution of an instruction that follows a currently-executing serializing instruction s The assertion or negation of SMIACT# s The entering of the Halt state and the Stop Grant state Negating EWBE# does not prevent the completion of any type of cycle that is currently in progress. Sampled The processor samples EWBE# on each clock edge that BRDY# is sampled asserted during all memory write cycles (except writeback cycles), I/O write cycles, and special bus cycles. If EWBE# is sampled negated, it is sampled on every clock edge until it is asserted, and then it is ignored until BRDY # is sampled asserted in the next write cycle or special cycle. If EFER[3] is set to 1, then EWBE# is ignored by the processor. For more information on the EFER settings and EWBE#, see "EWBE# Control" on page 229. 110 Signal Descriptions Chapter 5