AMD AMD-K6-2/400 User Guide - Page 63
Debug Registers,
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23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Debug Registers Figures 26 through 29 show the 32-bit debug registers supported by the processor. These registers are further described in "Debug" on page 268. Symbol LEN 3 R/W 3 LEN 2 R/W 2 LEN 1 R/W 1 LEN 0 R/W 0 Description Length of Breakpoint #3 Type of Transaction(s) to Trap Length of Breakpoint #2 Type of Transaction(s) to Trap Length of Breakpoint #1 Type of Transaction(s) to Trap Length of Breakpoint #0 Type of Transaction(s) to Trap Bits 31-30 29-28 27-26 25-24 23-22 21-20 19-18 17-16 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 LEN R/W LEN R/W LEN R/W LEN R/W G 3 322 1 100 D GLGLGLGLG L E E 332 21 10 0 Reserved Symbol GD GE LE G3 L3 G2 L2 G1 L1 G0 L0 Description Bit General Detect Enabled 13 Global Exact Breakpoint Enabled 9 Local Exact Breakpoint Enabled 8 Global Exact Breakpoint # 3 Enabled 7 Local Exact Breakpoint # 3 Enabled 6 Global Exact Breakpoint # 2 Enabled 5 Local Exact Breakpoint # 2 Enabled 4 Global Exact Breakpoint # 1 Enabled 3 Local Exact Breakpoint # 1 Enabled 2 Global Exact Breakpoint # 0 Enabled 1 Local Exact Breakpoint # 0 Enabled 0 Figure 26. Debug Register DR7 Chapter 3 Software Environment 41