AMD AMD-K6-2/400 User Guide - Page 160
W/R# (Write/Read
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Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 5.54 W/R# (Write/Read) Pin Attribute Summary Output The processor drives W/R# to indicate whether it is performing a write or a read cycle on the bus. In addition, W/R# is used to define other bus cycles, including interrupt acknowledge and special cycles. See Table 23 and Table 24 on page 142 for more details. Driven and Floated W/R# is driven off the same clock edge as ADS# and remains in the same state until the clock edge on which NA# or the last expected BRDY# of the cycle is sampled asserted. W/R# is driven during memory cycles, I/O cycles, special bus cycles, and interrupt acknowledge cycles. W/R# is floated off the clock edge on which BOFF# is sampled asserted and off the clock edge that the processor asserts HLDA in response to HOLD. 138 Signal Descriptions Chapter 5