Intel VC820 Design Guide - Page 105
Initial Timing Analysis, Equation 3-1. Setup Time, Equation 3-3. Maximum Flight Time
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Advanced System Bus Design 3.2.1 Initial Timing Analysis Perform an initial timing analysis of the system using Equation 3-1 and Equation 3-2 shown below. These equations are the basis for timing analysis. To complete the initial timing analysis, values for clock skew and clock jitter are needed, along with the component specifications. These equations contain a multi-bit adjustment factor, MADJ, to account for multi-bit switching effects such as SSO pushout or pull-in that are often hard to simulate. These equations do not take into consideration all signal integrity factors that affect timing. Additional timing margin should be budgeted to allow for these sources of noise. Equation 3-1. Setup Time TCO_MAX + TSU_MIN + CLKSKEW + CLKJITTER + TFLT_MAX + MADJ ≤ Clock Period Equation 3-2. Hold Time TCO_MIN + TFLT_MIN - MADJ ≥ THOLD + CLKSKEW Symbols used in Equation 3-1 and Equation 3-2: - TCO_MAX is the maximum clock to output specification1. - TSU_MIN is the minimum required time specified to setup before the clock1. - CLKJITTER is the maximum clock edge-to-edge variation. - CLKSKEW is the maximum variation between components receiving the same clock edge. - TFLT_MAX is the maximum flight time as defined in Section 3.1, "Terminology and Definitions" on page 3-1. - TFLT_MIN is the minimum flight time as defined in Section 3.1, "Terminology and Definitions" on page 3-1. - MADJ is the multi-bit adjustment factor to account for SSO pushout or pull-in. - TCO_MIN is the minimum clock to output specification1. - THOLD is the minimum specified input hold time. Note: The Clock to Output (TCO) and Setup to Clock (TSU) timings are both measured from the signals last crossing of VREF, with the requirement that the signal does not violate the ringback or edge rate limits. See the respective Processor's datasheet and thePentium® III Processor Developer's Manual for more details. Solving these equations for TFLT results in the following equations: Equation 3-3. Maximum Flight Time TFLT_MAX ≤ Clock Period - TCO_MAX - TSU_MIN - CLKSKEW - CLKJITTER - MADJ Equation 3-4. Minimum Flight Time TFLT_MIN ≥ THOLD + CLKSKEW - TCO_MIN + MADJ Intel®820 Chipset Design Guide 3-5