Intel VC820 Design Guide - Page 67
Compensation, 2.7.10 AGP Pull-ups, 2X/4X Timing Domain Signals
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Layout/Routing Guidelines 2.7.9 2.7.10 Compensation The MCH AGP interface supports resistive buffer compensation (RCOMP). Tie the GRCOMP pin to a 40 Ω 2% (or 39 Ω 1%) pull-down resistor (to ground) via a 10 mil wide, very short (
Intel
®
820 Chipset
Design Guide
2-41
Layout/Routing Guidelines
2.7.9
Compensation
The MCH AGP interface supports resistive buffer compensation (RCOMP). Tie the GRCOMP pin
to a 40
Ω
2% (or 39
Ω
1%) pull-down resistor (to ground) via a 10 mil wide, very short (<0.5”)
trace.
2.7.10
AGP Pull-ups
AGP control signals require pull-up resistors to VDDQ on the motherboard to ensure they contain
stable values when no agent is actively driving the bus. The signals requiring pull-up resistors are:
•
1X Timing Domain Signals
— FRAME#
— TRDY#
— IRDY#
— DEVSEL#
— STOP#
— SERR#
— PERR#
— RBF#
— PIPE#
— REQ#
— WBF#
— GNT#
— ST[2:0]
It is critical that these signals are pulled up to VDDQ (NOT 3.3V).
The trace stub to the pull-up resistor on 1X timing domain signals should be kept to less than
0.5 inch to avoid signal reflections from the stub.
The strobe signals require pull-up/pull-downs on the motherboard to ensure they contain stable
values when no agent is driving the bus.
Note: INTA# and INTB# should be pulled to 3.3V – not VDDQ.
•
2X/4X Timing Domain Signals
—
AD_STB[1:0]
(pull-up to VDDQ)
—
SB_STB
(pull-up to VDDQ)
—
AD_STB[1:0]#
(pull-down to ground)
—
SB_STB#
(pull-down to ground)
The trace stub to the pull-up/pull-down resistor on 2X/4X timing domain signals should be
kept to less than 0.1 inch to avoid signal reflections from the stub.
The pull-up/pull-down resistor value requirements are shown in the table below:
The recommended AGP pull-up/pull-down resistor value is 8.2 K
Ω
.
Rmin
Rmax
4 K
Ω
16 K
Ω