Intel VC820 Design Guide - Page 64
Table 2-9. TYPDET#/VDDQ Relationship, always, How does the regulator switch?
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Layout/Routing Guidelines AGP 2.0 requires that these power planes be separate. In conjunction with the 4X data rate, the AGP 2.0 Interface Specification provides for low-voltage (1.5V) operation. The AGP 2.0 Specification implements a TYPEDET# (type detect) signal on the AGP connector that determines the operating voltage of the AGP 2.0 interface (VDDQ). The motherboard must provide either 1.5V or 3.3V to the add-in card depending on the state of the TYPEDET# signal (refer to Table 2-9. The 1.5V low-voltage operation applies ONLY to the AGP interface (VDDQ); VCC is always 3.3V. Note: The motherboard provides 3.3V to the Vcc pins of the AGP connector. If the graphics controller needs a lower voltage, then the add-in card must regulate the 3.3V VCC voltage to the controller's requirements. The graphics controller may ONLY power AGP I/O buffers with the VDDQ power pins. The TYPEDET# signal indicates whether the AGP 2.0 interface operates 1.5 volts or 3.3 volts. If TYPEDET# is floating (no connect) on an AGP add-in card, the interface is 3.3 volts. If TYPEDET# is shorted to ground, the interface is 1.5 volts. Table 2-9. TYPDET#/VDDQ Relationship TYPEDET# (on add-in card) VDDQ (supplied by MB) GND N/C 1.5V 3.3V As a result of this requirement, the motherboard must provide a flexible voltage regulator. This regulator must supply the appropriate voltage to the VDDQ pins on the AGP connector. For specific design recommendations, refer to the schematics in Appendix A, "Reference Design Schematics: Uni-Processor" and Appendix B, "Reference Design Schematics: Dual-Processor". VDDQ generation and AGP VREF generation must be considered together. Before developing VDDQ generation circuitry, refer to the AGP 2.0 Interface Specification. Figure 2-31 demonstrates one way to design the VDDQ voltage regulator. This regulator is a linear regulator with an external, low RDS-ON FET. The source of the FET is connected to 3.3V. This regulator will convert 3.3V to 1.5V or pass 3.3V depending on the state of TYPEDET#. If a linear regulator is used, it must draw power from 3.3V (not 5V) in order to control thermals (i.e., 5V regulated down to 1.5V with a linear regulator will dissipate approximately 7W at 2A). Because it must draw power from 3.3V and, in some situations, must simply pass that 3.3V to VDDQ (when a 3.3V add-in card is placed in the system), the regulator MUST use a low Rdson FET. AGP 1.0 modified VDDQ3.3min to 3.1V. Using an ATX power supply; the 3.3Vmin is 3.168V. Therefore, 68 mV of drop is allowed across the FET at 2A. This corresponds to a FET with an Rdson of 34 mW. How does the regulator switch? The feedback resistor divider is set to 1.5V. When a 1.5V card is placed in the system, the transistor is off and the regulator regulates to 1.5V. When a 3.3V card is placed in the system, the transistor is on, and the feedback is pulled to ground. When this happens, the regulator drives to gate of the FET to nearly 12V. This turns the FET on and passes 3.3V - 2A * RDS-ON to VDDQ. 2-38 Intel®820 Chipset Design Guide