HP Visualize J5000 hp Visualize J5000, J7000 workstations service handbook (a4 - Page 64

Invoke LDB, Check LANIC address.

Page 64 highlights

Troubleshooting Identifying LCD-Indicated Conditions Table 3-1. Chassis Codes for J5000 and J7000 Workstations Ostat INI FLT WRN TST WRN FLT TST WRN FLT INI TST INI FLT FLT TST INI FLT FLT FLT FLT Code FRU 3n07 SYS BD 3n09 SYS BD 3n1A SYS BD 3n1B SYS BD 3n1B SYS BD 3n1B SYS BD 3n1C 3n1C 3n1C 3n2s SYS BD SYS BD SYS BD SYS BD 3nBC IO BD 3nBC 3nBC SYS BD IO BD 3nCD IO BD 3nCD SYS BD 3nCD SYS BD 3nCD SYS BD 3nEC SYS BD 3nF4 SYS BD 3nFC SYS BD Message Description CPUn invoke LDB CPU n is starting the low-level debugger. bad sys mde byte CPU n detected an unsupported system mode. hversion mismtch Stable store hardware version doesn't match system. chck model strng Check model string with version in stable store. model str msmtch Model string doesn't match that in stable store. fatal model str Error reading model string from stable store. test software ID Check LANIC address. update sw ID Update LANIC address. update sw ID err Error updating LANIC address. Invoke LDB: s CPU n is awaiting the low-level debugger for s more seconds. test sys clocks CPU n is verifying processor clocks with the real-time clock. init sys clocks CPU n has initialized the processor clocks. RTC tick timeout The real-time clock is ticking too slowly or not at all. RTC tick timeout The real time clock is ticking too slowly or not at all. check defaults CPU n is initializing stable store values to system defaults. init defaults CPU n finished initializing stable store values. init EEPROM err CPU n detected an error writing to stable store. bad sys config CPU n detected an illegal CPU board configuration. EEPROM boot limt CPU n detected a fatal error writing the EEPROM. bad sys bd id CPU n cannot identify CPU board. 60 Chapter 3

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60
Chapter 3
Troubleshooting
Identifying LCD-Indicated Conditions
INI
3
n
07
SYS BD
CPU
n
invoke LDB
CPU
n
is starting the low-level debugger.
FLT
3
n
09
SYS BD
bad sys mde byte
CPU
n
detected an unsupported system
mode.
WRN
3
n
1A
SYS BD
hversion mismtch
Stable store hardware version doesn’t
match system.
TST
3
n
1B
SYS BD
chck model strng
Check model string with version in stable
store.
WRN
3
n
1B
SYS BD
model str msmtch
Model string doesn’t match that in stable
store.
FLT
3
n
1B
SYS BD
fatal model str
Error reading model string from stable
store.
TST
3
n
1C
SYS BD
test software ID
Check LANIC address.
WRN
3
n
1C
SYS BD
update sw ID
Update LANIC address.
FLT
3
n
1C
SYS BD
update sw ID err
Error updating LANIC address.
INI
3
n
2s
SYS BD
Invoke LDB:
s
CPU
n
is awaiting the low-level debugger
for
s
more seconds.
TST
3
n
BC
IO BD
test sys clocks
CPU
n
is verifying processor clocks with
the real-time clock.
INI
3
n
BC
SYS BD
init sys clocks
CPU
n
has initialized the processor clocks.
FLT
3
n
BC
IO BD
RTC tick timeout
The real-time clock is ticking too slowly or
not at all.
FLT
3
n
CD
IO BD
RTC tick timeout
The real time clock is ticking too slowly or
not at all.
TST
3
n
CD
SYS BD
check defaults
CPU
n
is initializing stable store values to
system defaults.
INI
3
n
CD
SYS BD
init defaults
CPU
n
finished initializing stable store
values.
FLT
3
n
CD
SYS BD
init EEPROM err
CPU
n
detected an error writing to stable
store.
FLT
3
n
EC
SYS BD
bad sys config
CPU
n
detected an illegal CPU board
configuration.
FLT
3
n
F4
SYS BD
EEPROM boot limt
CPU
n
detected a fatal error writing the
EEPROM.
FLT
3
n
FC
SYS BD
bad sys bd id
CPU
n
cannot identify CPU board.
Table 3-1. Chassis Codes for J5000 and J7000 Workstations
Ostat
Code
FRU
Message
Description