HP Cluster Platform Interconnects v2010 Quadrics QsNetII Interconnect - Page 103
Using the selftest Utility
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12 Maintenance and Diagnostic Procedures The procedures described in this section enable you to diagnose and test your HP Cluster platform to resolve problems or as part of scheduled maintenance. The following procedures are described: • Using the interconnect firmware's internal selftest utility, (see Section 12.1). • Using the qsnetstat script and manual procedures for environmental monitoring, (see Section 12.2). • Using the qselantest command to test links, (see Section 12.3). • Using the qsnet2_dmatest command to test a statically designated link, (see Section 12.4 ). • Using the qsnet2_level_test command under HP XC to diagnose interconnect problems, (seeSection 12.5). • Using the qsnet2soaktest script to perform soak testing under HP XC only, (see Section 12.6). • Using the swmlogger utility to pass events to the syslog log file, (see Section 12.7). • Using the jtest errors command option to detect errors, (see Section 12.8). • Using a combination of diagnostics to perform drain time testing as part of planned system maintenance , (see Section 12.9). • Using the qsnet2_drain_test script to perform drain time testing as part of planned system maintenance on a system running HP XC, (see Section 12.10). • Using diagnostic commands to test specific replaceable components, (see Section 12.11). • Collecting QM500 manufacturer data (VPD), (see Section 12.12). • Using qsnetsoak to run a network soak test, (see Section 12.13). • Using the qsdiagadm command, (see Section 12.14). • Using the qsctrl command, (see Section 12.15). • Using the qsportmap command to map the link cable connections, (see Section 12.16). • Using the qsnetsoak command, (seeSection 12.17). 12.1 Using the selftest Utility An example of running the selftest option from the main menu was shown in Section 11.4. This test provides the following features: • Tests all the control card interfaces to ensure that communication exists between both A and B controller cards, indicating that failover is possible in the event of controller failure. • Tests the internal I2C and JTAG interfaces. • Verifies the clock operational status and frequency. • Determines the board population in the interconnect chassis, and verifies the correct number of switch integrated circuits are present on each card. Maintenance and Diagnostic Procedures 12-1