HP Cluster Platform Interconnects v2010 Quadrics QsNetII Interconnect - Page 35

The post-installation verification procedure includes a clock verification task.

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6. Repeat steps 1-5 until all interconnect controller cards are cabled to their respective clock boxes. 7. Connect the synchronization cable between the clock boxes, as specified in the cabling tables. 8. Ensure that the clock mode switches are set to master for clock box A and Slave for clock box B. 9. The post-installation verification procedure includes a clock verification task. Ensure that the complete clock network is visible and the clock has a frequency of 665 MHz (plus or minus 0.5 MHz). 128-Port Interconnect Modules 3-11

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6.
Repeat steps 1-5 until all interconnect controller cards are cabled to their
respective clock boxes.
7.
Connect the synchronization cable between the clock boxes, as specified in
the cabling tables.
8.
Ensure that the clock mode switches are set to master for clock box A and
Slave for clock box B.
9.
The post-installation verification procedure includes a clock verification task.
Ensure that the complete clock network is visible and the clock has a frequency
of 665 MHz (plus or minus 0.5 MHz).
128-Port Interconnect Modules
3-11